1. Field of the Invention
The present invention relates to a network relay apparatus and more specifically to a technology of updating a programmable logic device included in the network relay apparatus.
2. Description of the Related Art
Recently, instead of ASICs (application specific integrated circuits) and software, programmable logic devices, for example, FPGA (field programmable gate array) that enables programming of its internal circuit and CPLD (complex programmable logic device) have often been used for implementation of the functions in network relay apparatuses, such as routers and switches.
Among the above programmable logic devices, SRAM-type FPGA generally downloads data called configuration data from a nonvolatile memory on its start-up and configures its internal circuit based on the downloaded data. This type of programmable logic device can readily modify and update the internal circuit by occasionally rewriting the configuration data stored in the nonvolatile memory. In the description hereinafter, the process of the programmable logic device that reads configuration data and configures its internal circuit is called “configuration”.
As is known in the art, with increasing size reduction of semiconductor, a software error (changing data in a memory cell) often occurs, for example, by the effect of radiation in such a programmable logic device. Reconfiguration of the programmable logic device is needed on the occurrence of a software error in the programmable logic device. Reactivation of all the peripheral devices including the programmable logic device is generally required simultaneously with such reconfiguration. More specifically, the reconfiguration of the programmable logic device causes the values of all the interfaces included in the programmable logic device to become indefinite and thereby fails to ensure the operations of the peripheral devices. The reconfiguration also results in resetting information kept in the programmable logic device (e.g., configuration information and statistical information of the peripheral devices). It is accordingly needed to deactivate and reset the programmable logic device and its peripheral devices at the time of reconfiguration of the programmable logic device. When the programmable logic device subjected to such reconfiguration serves as a circuit to control the network interface unit of the network relay apparatus, the reactivation accompanied with the reconfiguration undesirably causes interruption of communication of the network relay apparatus.
One proposed technique to solve the above problem duplexes the programmable logic device, in order to avoid interruption of communication of the network relay apparatus (e.g., JP 2007-58419A).
This proposed technique avoids interruption of communication of the network relay apparatus during reconfiguration of the programmable logic device but requires duplexing the programmable logic device, which leads to the increasing cost and the complicated structure.